Closing this PR. Hardware E2E testing on local NPU1 confirmed the change produces incorrect DMA BD configurations.

Root cause: Skipping BD folding (applyAIRL3DmaFoldingPatterns) is not safe — the BD folding performs essential loop-to-BD-dimension conversion that changes the channel ops' wraps/strides. Without it, the runtime loop gets unrolled in airrt-to-npu with per-iteration BDs that don't match the hardware's expected multi-dimensional BD format. This produces wrong air.insts.bin (18 KB vs 6.5 KB reference, different offset patterns) and wrong numerical output on NPU1.

What doesn't work: Simply skipping the tiling/unrolling/BD-folding for all-1 tile sizes. The inner BD folding patterns (AIRSpecializeChannelWrapAndStrideInScfFor + AIRUnrollScfForIntoBDChain) are coupled — the isolation pattern splits loops so each channel op gets its own loop, the specialization pattern folds loops into BD dimensions, and the unroll pattern handles cases that can't be folded. Skipping all of them produces fundamentally different (and incorrect) BD configurations.

What would work: A more surgical approach that runs BD folding on the channel ops but prevents AIRUnrollScfForIntoBDChain from unrolling the specific outer runtime loops (from launch conversion). This requires modifying the BD folding patterns to distinguish between "BD loops" (inner loops that should be folded into dimensions) and "runtime loops" (outer loops that should be preserved). This is a larger change that needs careful design.

The compilation speed optimization plan at workspace/compilation_speed_optimization_plan.md remains valid as a design document for the correct approach.

Closing this PR. The compilation speed optimization (5x on MLIR passes for flash attention) is real and validated by profiling, but all implementation approaches explored so far hit correctness issues:

1. Skip-unroll approach (defer loop unrolling to airrt-to-npu): Fails because loopUnrollFull in airrt-to-npu doesn't handle airrt::EventType loop-carried values, and purgeSCFParContainingOnlyWaitAllOps unconditionally erases all scf.parallel ops including ones containing DMA ops.

2. Attribute-based approach (mark runtime loops, skip them in AIRUnrollScfForIntoBDChain): Produces different (incorrect) NPU instruction binaries because BD folding is effectively a no-op on multi-channel-op loop bodies, so the channel ops retain symbolic offsets that downstream passes can't resolve.

3. Strip segment/herd bodies before unrolling (Strategy A): Fails because air-to-std runs after the shim BD pass on the same module and needs segment bodies to match channel put/get pairs.

The correct approach requires either:

• Lightweight cloning in loopUnrollFullWithAsyncTokenPreserved that skips segment/herd body contents during the clone step (only clones the shell + L3 channel ops)
• Pipeline restructuring to run air-to-std channel matching before the shim BD pass's unrolling

The profiling analysis and detailed plan remain at workspace/compilation_speed_optimization_plan.md.

Known limitation: tiled path not covered

The lightweight unroller currently only fires when annotateFn is null — i.e., the non-tiled unroll path inside loopUnrollFullWithAsyncTokenPreserved. The tiled path (triggered by non-trivial shim-dma-tile-sizes like 2,2 or 4,4) goes through loopUnrollByFactor with an annotateFn callback, which still performs full O(N × body_size) deep-clone unrolling.

For the default aircc invocation (tile sizes 1,1), the shim BD pass doesn't tile or unroll — it directly applies BD folding. The lightweight unroller fires when the launch conversion creates scf.for loops that contain segments/herds and need to be unrolled without tiling.

Extending lightweight cloning to the tiled loopUnrollByFactor path is left as a follow-up.